A) Field of the Invention
The present invention relates to a solid state image pickup device having an overflow barrier region and its manufacture method.
B) Description of the Related Art
FIG. 8 is a schematic plan view of a pixel area of a solid state image pickup device.
The pixel area is constituted of a plurality of photoelectric conversion elements 60, vertical transfer channels 53, vertical transfer electrodes (first layer vertical transfer electrodes 58a and second layer vertical transfer electrodes 58b) and element isolation regions 57.
The photoelectric conversion elements 60 are formed in a semiconductor substrate, for example, in a honeycomb layout, and generate and accumulate signal charges corresponding to an incidence light amount. The vertical transfer channel 53 is formed in the semiconductor substrate in a close proximity to the photoelectric conversion elements 60. Signal charges generated and accumulated in the photoelectric conversion elements 60 are read to the vertical charge transfer channels 53 and transferred in the vertical transfer channels 53 in a vertical direction (a down direction in FIG. 8). Drive signals (transfer voltages) are applied to the vertical transfer electrodes (first layer vertical transfer electrodes 58a and second layer vertical transfer electrodes 58b) formed above the semiconductor substrate to control potentials in the vertical transfer channels 53 and transfer the signal charges read from the photoelectric conversion elements 60 in the vertical direction. The vertical transfer electrodes are made of polysilicon or they may be made of amorphous silicon.
The element isolation region 57 is formed between adjacent photoelectric conversion elements. The element isolation region 57 is used for electrically isolating the photoelectric conversion elements 60, vertical transfer channels 53 and the like. The element isolation region 57 is shown hatched in FIG. 8.
FIGS. 9A to 9C are schematic cross sectional views of conventional pixel areas of solid state image pickup devices.
Reference is made to FIG. 9A. An overflow barrier region 51 of a p-type impurity layer is formed in an n-type semiconductor substrate 50 to prevent blooming and the like. Electrons having an energy in excess of the barrier height cross the overflow region 51 and are absorbed in the n-type semiconductor substrate 50 to prevent blooming.
Formed in a surface layer of the n-type semiconductor substrate 50 are an n+-type charge accumulation region 55 and a p+-type burying layer 56 for burying the n+-type charge accumulation region 55. The photoelectric conversion element is constituted of these regions and the like, and signal charges generated in correspondence with the incidence light amount are accumulated in the charge accumulation region 55. One pixel is constituted of one photoelectric conversion element.
In this specification, a region having an n-type impurity concentration higher than that of the n-type region is represented by an n+ type region, a region having an n-type impurity concentration lower than that of the n-type region is represented by an n−-type region, a region having a p-type impurity concentration higher than that of the p-type region is represented by a p+ type region, a region having a p-type impurity concentration lower than that of the p-type region is represented by a p−-type region.
Signal charges accumulated in the charge accumulation region 55 are read to a vertical transfer channel 53 of an n-type region via a read gate 54 of a p-type region, and transferred in the vertical transfer channel 53 in a vertical direction as a whole, as described above.
A vertical transfer electrode 58 is formed above the vertical transfer channel 53 via an insulating film (e.g., an ONO film). A voltage applied to the vertical transfer electrode 58 controls a potential of the gate 54 to read the signal charges from the charge accumulation region 55 to the vertical transfer channel 53. The signal charges in the vertical transfer channels are transferred in the vertical direction as a whole as described above.
A light shielding film 59 made of, e.g., tungsten, is formed above the vertical transfer electrode 58. An opening 59a is formed in the light shielding film 59 above the charge accumulation region 55.
A p-type impurity layer 52 formed just under the vertical transfer channel 53 protects the vertical transfer channel 53 in the sense that unnecessary charges are mixed in the vertical transfer channel 53. It also functions to reduce smear and separate pixels.
As described earlier, an element isolation region 57 is formed between adjacent photoelectric conversion elements to electrically separate photoelectric conversion elements, vertical transfer channels 53 and the like.
An electrode 61 is disposed on the n-type semiconductor substrate 50. A voltage applied to the n-type semiconductor substrate 50 via the electrode 61 performs a blooming suppressing operation of sweeping excessive charges equal to or larger than a saturation level in each pixel to the substrate and an electronic shutter operation of sweeping out charges accumulated in the charge accumulation regions 55.
Reference is made of FIG. 9B. A conventional solid state image pickup device shown in FIG. 9B is different from that shown in FIG. 9A in that a charge accumulation region 55 has a two-layer structure. In the solid state image pickup device shown in FIG. 9A, the charge accumulation region 55 is made of only a single n+-type impurity layer, whereas in the device shown in FIG. 9B, the charge accumulation region 55 is made of an n+-type impurity layer and a lower n-type impurity layer.
By making the charge accumulation region 55 have a multi-layer structure, it is possible to form a pn junction at a deep position of the semiconductor substrate and to broaden an effective depletion layer in the n-type region. In this specification, the effective depletion layer is intended to mean a depletion layer of the type that signal charges generated through photoelectric conversion are collected in the charge accumulation region.
Reference is made to FIG. 5C. A conventional solid state image pickup device shown in FIG. 9C is different from that shown in FIG. 9B in that an overflow barrier layer 51 has a two-layer structure. In the solid state image pickup device shown in FIG. 9B, an overflow barrier region 51 is made of only a single p-type impurity layer, whereas in the device shown in FIG. 9C, the overflow barrier layer 51 is made of an p-type impurity layer and an upper p−-type impurity layer.
By making the overflow barrier layer 51 have a multi-layer structure, it is possible to lower an impurity concentration of the p-type region constituting the pn junction.
Generally, light in a long wavelength range incident upon a photoelectric conversion element is photoelectrically converted at a deep position of the semiconductor substrate. The position of the overflow barrier region 51 is shallow because of recent requirements for high resolution and compactness of solid state image pickup devices. Therefore, light in the long wavelength range is photoelectrically converted invalidly at the position deeper than the overflow barrier region 51 so that a sensitivity relative to long wavelength light cannot be retained sufficiently in some cases. If the overflow barrier region 51 is formed at a deep position of the semiconductor substrate in order to retain the long wavelength light sensitivity, there arises a problem that blooming between pixels is likely to occur (e.g., refer to Japanese Patent Laid-open Publication No. 2000-150848).